Author: Joseph Byrne
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BWR 15: Qualcomm Unveils Data-Center Strategy and More
Joe and Bob discuss the latest advancements in semiconductor technology, including IBM’s sub-1 nanometer process, Intel’s new milestones, Qualcomm’s data center strategy, Etched, OpenAI, and Oxmiq, interconnect companies/technologies such as CXL and Upscale, and memory company Micron Technology.. They explore how these innovations are shaping the future of chip design and data center infrastructure. Available…
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NextSilicon Maverick-2 Accelerates High-Performance Computing
As data-center AI has come to dominate the market for computing accelerators such as GPUs, new vendors are targeting the previous main application of accelerators, high-performance computing (HPC), introducing unusual technologies. NextSilicon is one of these companies, supplying national labs and other HPC customers with its Maverick-2 processor based on a data-flow architecture. The HPC…
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Tensordyne Napier Slashes Costs and Boosts Token Rates
The Tensordyne Napier NPU aims to beat Nvidia/Groq and Amazon/Cerebras at a fraction of the power, floor space, and cost, owing to logarithmic computing.
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BWR Ep 14: Broadcom, Marvell, and Nvidia Earnings Plus New Tech
Byrne and Wheeler discuss recent developments in the tech industry, including AMD’s acquisition of MEXT, #NVIDIA’s impressive growth, Broadcom’s earnings, and innovative chip technologies like Tensordyne’s log-domain processing and Huawei’s Tau scaling. They analyze market trends, product launches, and strategic partnerships shaping the future of semiconductors and AI hardware.
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Bolt Confounds Skeptics, Tapes Out Zeus GPU
Startup GPU maker Bolt Graphics is on track to deliver development kits to lead customers by the end of the year, having taped out its first chip last month. By the end of 2027, the company expects to begin shipping PCIe cards based on a production version of its Zeus GPU. This schedule represents a…
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Matrix Multiplication Comes to x86
The x86 Ecosystem Advisory Group (EAG, better known as AMD and Intel) has defined the AI Compute Extensions (ACE) for the x86 architecture. The group frames these instructions as a palette, a term Intel coined for a specific configuration of its Advanced Matrix Extensions (AMX). Those AI-focused instructions and associated hardware first appeared in Sapphire…