Real Insight from Code to Silicon
More Visibility Where It Counts
Software Debug
All the tools you need to debug and trace Intel, AMD and Arm embedded applications in one place.
Hardware Validation
Quickly validate both hardware/firmware interactions and operating margins in our design.
Chip Debug
Verify, test and characterize SoCs, FPGAs and ASICs pre- and post-tapeout.
Manufacturing Test
Non-intrusive test technologies to maximize test coverage and diagnostics.
Product eBooks
The 1st edition of this eBook described DDR4 testing using CT and/or MAV actions in the production environment. For this 2nd edition, content has been added which provides an overview of DDR4 device structure, commands, and operation sequences.
Latest Articles & Press Releases
Webinar: Embedded @Scale JTAG-based Debug of x86 Servers
- March 7, 2021
Beginning with Microsoft Azure's Project Olympus, and now a standard within the Open Compute Project, many datacenter servers are now optionally equipped with hardware connectivity between the platform BMC and CPU scan chain. The BMC can thus act as an autonomous JTAG-based embedded out-of-band debug agent, provide low-level triage of system events, such as crashes and hangs. Other use cases, such as hardware validation, manufacturing test, and forensics telemetry are also enabled by this technology.
Webinar: Intel Architectural Event Trace
- February 23, 2021
Don't miss it! ASSET's Alan Sguigna (that's me), in collaboration with the UEFI Forum, will be presenting and demonstrating SourcePoint using the Intel Architectural Event Trace (AET) feature, which offers an unparalleled level of insight into x86 event generation and code execution.
Webinar: JTAG-based debugging of AMD EPYC servers
- January 5, 2021
ASSET is pleased to announce that yours truly is presenting a technical session on JTAG-based firmware debugging of AMD EPYC servers, to be held on Wednesday, January 27th at 1:30pm Central Standard Time.
The UP Squared Chronicles Episode 4: Using Intel Processor Trace with POST Codes
- January 3, 2021
I became curious this past week on how UEFI handles POST codes. These are “markers” for the boot process, and tells you at what stage the platform initialization is. Can we easily correlate POST codes with the operation of the UEFI firmware?
Learn More Live
Here’s your chance to see how easy it is to debug and test using SourcePoint or ScanWorks. Let us walk you through it!
