Not to be confused with the album by Daft Punk.
While the CPU is a heart of a computer system, moving the data to and from and processing it as required, this data still needs to be held somewhere. That's where RAM comes into play. RAM stands for Random Access Memory — any place in the memory can be written at any time without having to wait. This contrasts with sequential access memory, where you have to rewind or fast-forward a tape or wait for a certain time to access data.
Most people simply call RAM "memory" now. In computer science/engineering parlance, this type of memory is known as Main Memory. It comprises the main operating part of the computer's storage hierarchy. Just as Clock Speed is misunderstood to be the only measure of Central Processing Unit power, capacity is thought to be the only important measurement in when it comes to Random Access Memory.
Memory is not all about capacity. Unless a system or game is idle, memory will not stay with the same data indefinitely. It's constantly moving data on and off the memory chips to handle the ever changing data. In other words, capacity is important, but so is how fast it can move data on and off the chip. In situations where the machine has to multitask (such as PCs, PlayStation 3, and Xbox 360), capacity can increase performance, but the returns diminish quickly (i.e., if you double the RAM, it might really boost performance, but if you double it again, it won't do much). More available RAM is helpful for storing more data that you wish to use immediately. It prevents more frequent access to the slower hard drive/DVD/Blu-Ray disc, which to a processor takes an eternity.
Like a CPU, memory speed is measured in Clock Speed in between latency. And latency tends to affect memory more than processors. This is because one also has to take into account the speed of the bus, the shared electrical pathway between components. With RAM embedded on the CPU die, there is a very short distance and a dedicated pathway that the bits can travel across, while RAM placed in other areas requires the bits to travel the shared bus, which may have other devices using it. This means factors such as the bus speed and the number of other devices requiring the bus can contribute to data-transfer latency. Even the physical length of the bus can become a non-trivial factor in how fast data can be moved in and out of RAM.
In addition to clock speed, latency, and capacity, memory is also measured in bandwidth. Bandwidth is the amount of data that flows between the processors and the memory. Bandwidth tends to have a much higher maximum capacity than the memory capacity, typically 500 to 1000 times greater. This is unlikely to ever be all used up (why bandwidth size is called a "theoretical maximum"; it could reach that maximum, in theory). It's just to ensure the smoothest running between the memory and processors. How these measurements compare depends on the type or memory.
One of the problems with memory and the CPU during the development of computers is something called the Memory Wall
. While performance of the CPU from 1986 to 2000 improved annually at about 56%, RAM performance only improved by about 10% annually. Thus it's only a matter of time before RAM becomes too slow for the CPU, that is, the CPU will do its task and sit idle waiting for more data to or from RAM. However, while improvements in efficiency of the CPU (for example, Intel's Core 2 processors versus the Pentium D processors) have stalled this problem, physics essentially dictates unless memory performance starts improving, CPU performance will start suffering.
A misunderstood aspect of memory is that more memory automatically equates to better performance. This probably started around in The '90s when "just good enough" computers were sold. Technology was improving at such a rapid pace that the amount of RAM in a recently purchased computer may not be enough to run a program a half year down the road. The amount of RAM available to a computer is a massive YMMV in terms of performance. But the test is actually simple to determine if a system would benefit from more. If RAM is constantly full and using the hard drive's swap filenote , the system could definitely benefit from more RAM. If RAM is barely being used, then the system isn't really using it so adding more won't help. This changed with later operating systems, however, where extra memory is passively used to hold extra data files for fast access by programs, filling up the longer the system is on. If the memory is needed for active use, then the cache is pushed out to make room.
As a tangible example, imagine you're grocery shopping. You opt for the smaller basket at first. Later in life or at some point, you start to require more goods. If you continue to use the basket, it overflows and you have to complete the shopping trip and unload what you have back home and come back another time. However, if you use the much larger cart, you can fit more at once and do everything in one trip. But just because adding one shopping cart made your life easier doesn't mean adding another will. (Though you can "cache" groceries you may need for future use into the extra cart and set that aside, much like an operating system does for pre-fetching data that may be needed later.)
How RAM is used by computers
As computer became more sophisticated in the 1970s and 1980s, it was quickly becoming apparent that RAM couldn't be simply thought of as a pool of bytes (or whatever minimum amount of data) that a single program could access. RAM now had to be shared between different programs and different computers of the system family could have different amounts of RAM. In addition, as memory is used, free space becomes less contiguous as data is removed (called memory fragmentation), which becomes a problem when a chunk of data can't find a nice spot to fit in RAM despite there being enough space. So to ease managing data in RAM, these main methods were developed:Segmented Memory
This was primarily used by 8-bit and 16-bit CPUs, and in some higher-end 32-bit CPUs, to address memory that was larger than their internal word size. Segmented memory usually consisted of two pieces of data: the memory page (though different from paged memory discussed below) and the address in that page.For example, the venerable MOS 6502 could address 16-bits of memory, but it could only process 8-bits at a time. This created some headaches in that specific regions of memory were higher performance than others. Going back to the 6502, it had 8-bits of pages and 8-bits of addresses, with memory page 0 (the "zero page") being higher performance to access because address generation worked neatly in the 8-bit internal data processing. To address other places in memory, at least two operations were needed. Thus, developers would try to stick stuff in the zero page to help with micro-optimizations.
One of the most infamous examples of segmented memory was with Intel's 8086. As it was a 16-bit processor with a 20-bit address space, it calculated addresses using two 16-bit values, but used the second 16-bit value by adding it in a way that pages overlapped each other. Developers abused this by storing data at the start and ends of the address space because there was a wrap-around effect. This caused compatibility problems with the Intel 80286 which upgrade the memory address to 24-bits, which had to be fixed with hack to keep the behavior that still exists to this day in the x86 line.
Virtual Memory
Virtual memory is the technique that the amount of memory the program sees is as big as how much memory the CPU can address, regardless of how much actual memory is in the computer. For example, a CPU that can address 4 gigabytes of memory (typical of a 32-bit system) may only have 1 gigabyte of RAM installed. To the program, all 4 gigabytes are addressable. However, it's up to a part of the computer called the Memory Management Unit (MMU) to translate the virtual address to a physical one. The physical address could, however, be in RAM or in permanent storage in the form of a page file (in Windows) or swap partition (in UNIX). If the amount of physical memory (both RAM and page/swap) runs out, the MMU will tell the OS there's no more memory, which will tell the app that so it can figure out what to do. In most cases, the app will likely crash.The biggest benefit though is the app no longer has to worry about what's going on in RAM. The OS takes care of managing the space in memory the application takes up. The only thing the application has to worry about is if the OS tells it there's no more memory available. In addition, this can apply to any memory in the system. For example, most modern operating systems support virtual memory systems for video cards such that if the video card runs out of its own RAM (called VRAM), it can use system RAM to store additional data. Intel has taken advantage of this by having their more recent integrated GPUs no longer reserve RAM for itself. Instead it relies solely on virtualized memory.
Note that a lot of literature may call virtual memory the idea of using permanent storage to hold data from RAM if RAM starts to run out of space.
Paged Memory
Paged memory is the technique that instead of byte-addressing data in memory, have a larger, fixed amount of memory space called pages that are managed instead. There are several benefits to this:- In a multitasking system, in order to manage each program's memory space so they don't clobber each other, the data has to be tagged with who owns it. If each byte were tagged, you would need an indexing system that will take up as much data, if not larger, than the amount of data the programs are using.
- It's much faster to access and transfer more data at once than each individual byte.
- This reduces the amount of fragmentation, as if there's free space, there's always at least the size of the memory page of contiguous space.
- It doesn't require the application to have a continuous block of memory space assigned to it. While it's preferable to have a continuous space, pages can live anywhere in memory. In addition, because each page size is guaranteed, moving them around is relatively trivial.
- Paging also doesn't need any OS specific feature or a memory management unit. If the application has complete control of the memory system, it can do its own paging if needed.
The most common memory page size is 4 kilobytes. However, more systems are using larger page sizes, such as Apple's M-series of processors using a 32 kilobyte page size.
RAM By Technology
There are several ways to classify the RAM types, but the two most used are the technological classification (that is, by the technology underlining each type), and usage classification, breaking the types by their purpose. Here they are:Historical - Delay Line and Core memory
Before modern memory types became available, early machines still needed to store their data — even the ENIAC, which didn't even have storable program (it was controlled by sequentially wiring all the modules together) had some storage for data. Initially this was the very straightforward and obvious solution — static memory, that is, keeping the data in the electronic circuits named triggers, or flip-flops, that could remain in one of the two stable states. But because word size in those early machines was somewhere between 20 to 40 bits, and one flip-flop can hold at most two bits of information, while requiring at least four electronic valves at the time when the only available type of valve was a huge and fragile vacuum tube, having more than couple dozens of such "registers" was simply impractical.That's where everything got interesting. To hold bigger amounts of data several technologies were used, some of them being decidedly odd. Like storing the data as an acoustic waves (yes, bursts of sound) in mercury-filled tubes, or magnetic pulses on a rotating drum, typically called delay-line memory. Technically, these types of memory weren't even random-access, they were sequential, but they simulated RAM relatively well. Then there was a technology where the bits were stored as dots on the phosphor surface of a CRT — which had the advantage that the programmer could literally see the bits stored, which often helped in the software debugging.
But most of these technologies were not terribly practical; they were expensive, slow and (especially in the case of mercury delay lines) environmentally dangerous. Dr. An Wang (then of IBM) proposed a solution which took the industry by storm — magnetic core memory.
Core memory consisted of thousands of tiny (1-2 mm wide) donut-shaped magnetic cores, set on a grid of metal wires. By manipulating the voltages put on these wires, the state of any individual core could be read or written. Since there were no moving parts, as with a delay line or a drum, access time was much quicker. Core memory was also substantially denser than either delay-line or CRT memory, and used less power as well. It also held its content when the power was off, which was widely used at the time.
In addition to their compact size (for example, a unit holding 1K, a rather generous amount of the time, was a flat frame only 20x20x1 cm square), they were also rather cheap. Cores had to be assembled by hand, even in their last days (early attempts to mechanize the process failed and were abandoned once semiconductor RAM appeared), so most manufacturers used the cheap labor of East Asian seamstresses and embroiderers (who had been made redundant by the widespread adoption of sewing machines) thus making it affordable. Most Mainframes and Minicomputers used core memory, and it was ingrained into the minds of the people who worked on them to such extent that even now you can meet a situation when the word "core" is used as a synonym for RAM, even though computers in general haven't used it since The '70s.
A related technology from magnetic core memory was core rope memory. While the idea was similar by detecting magnetic polarities, where it differed was how it was wired. Instead of using a grid of wires, it ran through magnetic cores like a rope, hence its name. However, once it was wired, the data represented was effectively fixed, creating one of the first forms of Read Only Memory. This type of memory was used primarily in the UNIVAC line of computers, but also saw use in NASA's Apollo program and early Mars space probes.
As one last hurrah for the earlier delay-line type memory, Intel created bubble memory. The data was stored on magnetic film that could store "bubbles" of small, magnetized areas in parallel tracks. The data was then pulled towards one side of the film, read, then rewritten on the other side. Early implementations were fast enough and provided enough density to make it seem like a contender as a replacement for magnetic core memory. And since it was non-volatile, it could be used in place of storage drives at the time (typically floppies and hard drives). But solid-state RAM was improving at a rapid pace, flash memory was invented, and floppies and hard drives were becoming more practical. In addition, bubble memory needed a warmup period before it could be useable. Konami's early 80s arcade games were practically the only main commercial application, though it saw some use in computer systems.
Solid State RAM
Solid state RAM was the technology that finally ended the core era. It was an outgrowth of the attempts to miniaturize electronic circuits. Transistors had replaced vacuum tubes in early computers relatively quickly, due to their smaller size, reliability (they had no glass envelopes to break or filaments to burn out) and much lower power consumption. However, even the smallest transistors at the time were about the size of a small pencil eraser, and it took hundreds of them to make a working computer, so computers still remained bulky and expensive. In The '50s two engineers independently figured how to put several transistors and other electronic components on the same piece of semiconductor, and thus the integrated circuit was born. The sizes of the electronic circuits started to shrink almost overnight, and one of the first applications of them in the computer industry was for RAM.
- Static RAM, as mentioned above, is a type of memory where each bit is represented by a state of a certain type of circuit called a flip-flop. With one IC replacing several transistors and their attendant circuitry, static memory became much more affordable, and started appearing in larger and larger amounts. The main advantage of static memory is that it's very quick — basically, its speed is only limited by the speed of the physical processes inside the transistor, and these are extremely rapid. It also requires power only to write something, and takes only a token amount when reading or storing, so it dissipates almost no heat. SRAM's main disadvantage is it needs four or six transistors to implement, limiting its memory density compared to DRAM. The four-transistor variant is more complex to make because it replaces two of the transistors with resistors which must be just as small and have a high resistance value.
- Dynamic RAM, on the other hand, use a capacitor and typically a diode to store a bit. This takes up much less space to build on silicon than SRAM, allowing for higher capacities in the same space, and thus is cheaper per unit of memory. Unfortunately, capacitors lose charge over time, so they have to be periodically recharged, usually by reading the memory and writing the same data again, called "memory refresh". In addition, like core memory, reads are destructive and thus have to be re-written. This process takes either the attention of the CPU or the additional support circuitry on the memory chip itself. To add insult to injury, the need to constantly refresh the memory contents means that when the power gets turned off, all memory gets completely erased — core, being magnetic, was completely non-volatile. While SRAM is also volatile like DRAM, it requires so little power to maintain its state that a coin cell battery can keep its contents for years, whereas DRAM would've worn it down within in hours if not days. Still, the enormous density that DRAM offers makes it the most affordable and used type of the memory ever.
- Magnetic RAM is basically a return to core on a new level, where each ferrite donut of the old-style core is replaced by a ferrite grain in an IC. It has the density advantage of a DRAM (there is some penalty, but it's not that big), its speed is closer to static RAM, it's completely non-volatile and it can be written as fast at it is read (not to mention as many times as needed), negating most of the Flash Memory drawbacks. Unfortunately, due to Flash selling like ice-cream on a hot day, few producers could spare their fabs to produce it, and it requires significant motherboard redesign to boot. This and several technological bottlenecks seem to lock it in Development Hell for the time.
- On a side note, there's also an issue with security with non-volatile memory. For example, if a computer doing encryption had non-volatile memory, a person could turn off the machine, take out the memory, and do a dump of its contents without fear of losing it. For the same thing to happen with DRAM, the person would have to dump the RAM chip in liquid nitrogen to slow the discharge process to a crawl prior to turning off the computer. However, with the advent of on-the-fly encryption co-processors that encrypts data on the memory management unit itself before anything is even written out to the memory, non-volatile memory is making a comeback in a highly upgraded form.
- Another technology in the works is memory based on memristors. While theorized in the 1971 as the fourth passive two-terminal electrical component, it wasn't actually fabricated until 2008. Memristors have the property that resistance increases when current is flowed through one way and decreases when current goes the other. This changes the voltage across the part, which can be used to read a 0 or 1. Since it's a passive part, it's very fast and requires no power to retain its state. Currently this technology is being marketed on server-class hardware as NV-DIMM (Non-Volatile Dual-Inline Memory Module). With information going to and from the CPU now being encrypted before it is even written to memory by a dedicated co-processor, when used with the correct hardware, this type of memory is relatively secure.
Obsolete DRAM types
As DRAM has become the dominant form of RAM in many applications, it was bound to have multiple iterations. While we've settled on the DDR type (more or less), these were earlier versions of how DRAM was implemented.- Fast Page RAM - an evolution of regular DRAM, from the 286 era up until the early Pentium Era. It had a refresh rate of up to 70ns. A typical module of the era would hold up to 8MB of Fast Page RAM. They run at 66MHz speed. Also worth noting is that halfway through the RAM's lifespan, there was a slot design change and the amount of pin count for the connector went up from 30 to 72. The former is often known as a SIMM or Single Inline Memory Module, while the latter is known as a DIMM, or Dual Inline Memory Module.
- Extended Data Output (EDO) RAM - Starting from the middle of the Pentium Era, this RAM type emerged to replace Fast Page RAM. It is electronically backwards compatible Fast Page RAM and uses the same 72-pin Dual Inline Memory Module slots, and also runs at the same 66MHz speed as it's predecessor. However the refresh rate has been increased to 60ns. An enhanced version supporting Burst operations (BEDO RAM) was introduced late into the RAM type's life, but by then the market has already chosen SDRAM as it's successor due to SDRAM being the cheaper of the three (the RAM was also put in competition with Rambus DRAM). An EDO module can be up to 128MB in sizenote
- Synchronous DRAM (SDRAM) - Introduced in the mid 1990s, the key difference between SDRAM and previous RAM types was that, as the name implies, it ran in sync with a clock signal. This clock signal would drive a state machine within the RAM module, allowing for pipelining of RAM operations to increase throughput. It first hit the market at a speed of 66MHz late in the Pentium's life and facing competition from both BEDO RAM and Rambus DRAM, this RAM type eventually emerged as the consumer's choice due to its affordability and is the direct predecessor of DDR RAM. It was constantly worked on, and when it was finally usurped by DDR RAM in the Pentium 4 era, it had gained speeds of up to 133MHz and a module can be up to 512MB in size. Since DDR RAM was essentially the next generation of SDRAM, this generation was retroactively named to Single Data Rate (SDR) SDRAM.
- Rambus Dynamic RAM (RDRAM) - Introduced in the mid 90s, RDRAM focuses on slightly higher bandwidth, and much higher clock speed. It does come at the cost of higher power consumption, higher capacity, and slower latency. The last one has been reduced in later versions, to the point where the XDR variant on the PS3 has latency no slower than DDR memory. This meant the earlier versions were not that good for graphics. It didn't hurt the PlayStation 2, which used it for regular memory, not for video memory, but the Nintendo 64 did use it for video memory. This was one of many bottlenecks that kept the system from performing as well as its graphics looked.
Rambus DRAM is evidently good for video playback, hence why the PS2 and PS3 are considered such good movie players for their times. The PlayStation Portable doesn't use that kind of memory, given that the increased power consumption would drain the battery. This has meant that UMD movie playback on TVs is notably washed out. It was briefly used in the early 2000s for home PCs; however, although it was indeed blazing fast, upgrading it was way too expensive due to the high licensing fees that module manufacturers ended up passing down to the consumers, and many motherboard manufacturers felt that the licensing fees Rambus charged was too high (and again, those who put up with the high licensing costs passed the fee down to the consumers- this made both the RAM modules and motherboards appear more expensive than the other option, which is SDRAM).
Although Rambus produced a specification for XDR2, the idea had already effectively been outcompeted by GDDR and was never used. The PlayStation 3 was the last significant product to use this memory type.
DDR SDRAM - the current DRAM type
The DDR stands for "Double Data Rate". Typically, RAM processes the data once per clock cycle, while this kind of memory does it twice. It does come at the cost of slightly slower latency, but doubling the clock speed is a huge advantage for gaming. DDR became commercially available, and the Xbox was the first console to use DDR memory, while the competing PlayStation 2, and later 3, used the competing Rambus DRAM (see below). Each generation of DDR has reduced the operating voltage, which means it uses less power for each memory transfer. However, increasing speeds mean overall power use may still be higher.
Currently, we're into the fifth generation of DDR RAM. The generations are as follows:
- The original DDR RAM (sometimes retroactively called DDR1): 266 MT/s to 400 MT/s, Module size ranges from 128MB up to 2GB
- DDR2 RAM: 533 MT/s - 1066 MT/s, Modules sizes range from 512MB up to 4GB. Few motherboards and processors support driving the RAM at 1066 MT/s speed without overclocking, most maxes out at 800 MT/s.
- DDR3 RAM: 800 MT/s - 2133.33 MT/s , module size range from 1GB to 16GB, with 32GB modules on the roadmap. It is still being developed in tandem with DDR4 RAM (presumably because of embedded or lower cost applications) and as of 2015 reaches speeds of up to 2800 MT/s on overclocked models. However, most consumer CPUs supported only up to 2133.33 MT/s, after which manufacturers switched to use DDR4 RAM. The last consumer chips to use DDR3 RAM are the AMD Kaveri and the Intel Broadwell CPUs.
- DDR4 RAM: 1600 MT/s to 3200 MT/s (officially). Memory module size starts at 4GB. The RAM reached it's full 4300 MT/s in factory overclocked modules potential by the end of 2016. As of late 2019, CPUs still only officially support a maximum RAM speed of 3200 MT/s. However, newer CPUs unofficially support much higher speeds, with over 5000 MT/s possible with overclocking. The last consumer chips to use DDR4 RAM are the AMD Zen 3 and Intel Rocket Lake CPUs.
- DDR5 RAM: 3200 MT/s to 8800 MT/s (officially as of 2025). Launched in mid 2020, and the first modules arriving in mid-2021 with Intel's Alder Lake CPUs being the first to support the standard, with AMD's processors supporting it since Zen 4. The two standout features of DDR5 is that it has two independent access channels to increase access performance and includes error-correcting code on outbound data. note DDR5 RAM is also the first of its kind to support oddball sizes (for example, 24GB, 48GB and so on, per module).
Other DRAM types
GDDR SDRAM
GDDR SDRAM originally started out as a variant of DDR designed specifically for use with GPUs. It allows higher memory bandwidth as well as adding some extra functions, such as the ability to fill whole memory blocks with a single colour. The cost is higher latency, but most of the work GPUs do is predictable, so memory requests can be made ahead of time, and the data can arrive when it's needed with reasonable accuracy.
Although based on DDR RAM, it has evolved somewhat separately and so doesn't quite match up in terms of generations. GDDR4 and 5 were both based on DDR3. This was followed by GDDR5X, which is technically quad data rate and not really DDR at all. GDDR6 is an evolution of this, diverging further from the standard DDR. The first commercial GPUs using GDDR6 were released in 2018, and as of mid-2019 it is used by all new GPUs from both Nvidia and AMD. The latest is GDDR7, first introduced in 2024.
Embedded DRAM (eDRAM)
Typically, DRAM that's included in the chip that its servicing, rather than be its own module. This can come in the form of a die that's part of the package or integrated in the chip itself. The advantage of eDRAM is performance, as the distance between it and the chip minimizes latency and allows for faster clock speeds. However, its disadvantages are cost and that eDRAM takes up a lot of space on the chip if it's integrated into it.
IT-SRAM
1T-SRAM is something of a Non-Indicative Name. The technology uses DRAM (which typically uses 1 transistor, hence "1T") but has the support circuitry built in to handle DRAM refreshing so that the memory controller on the system doesn't have to do it and a block of SRAM cache. This makes it look like SRAM to the rest of the system. However, this limits how fast the RAM can operate. Probably its most famous use was being the system RAM in the GameCube and Wii.
High Bandwidth Memory (HBM)
HBM is the result of a wall that GDDR type memory hit. That is, even though GDDR5 has reached an impressive 7000 MT/s , it takes a lot of power to run it. In order to reduce power consumption and increase memory bandwidth at the same time, AMD teamed up with Samsung and SK Hynix to create HBM. The idea is to simply stack RAM dies on top of each other, use high density through-silicon-vias as communication channels, and use an interposing layer as the base that the GPU also sits on to talk to the memory. The result is a staggering 4096-bit bus interface in its first implementation and dozens of watts in power savings for the same amount of memory. The concept is similar to package-on-package manufacturing used in system-on-chip companies, where the processor is stacked on top of RAM in the same package. HBM is currently in its third generation, with the only difference from the first generation being a faster signaling speed, the memory bus is still 4096-bit wide.
As of 2023, usage of HBM has be mostly relegated to top-end GPU designs used in data centers. The main issue is cost, with the last reported cost of HBM2 being nearly 3x that of GDDR5, and that's without the interposer. In addition, manufacturing with it likely causes problems resulting in higher cost. One such issue is any one of the components has a problem in the final assembly of the package, it's much harder to fix. GDDR-based VRAM designs are modular and easier to isolate a troublesome component to replace it. Another problem is making sure the heights of the HBM chips and the main chip (or chips) are within an acceptable tolerance. Too much of difference can lead to noticeable issues with cooling, as was the case with the Radeon Vega video cards.
2-transistor, 0-capacitor (2T0C) RAM
Previously, DRAM's noted advantage was that it was denser than the equivalent number of bits for SRAM. However, the capacitor part of DRAM started to be a problem in process nodes smaller than 14nm. In order to achieve acceptable capacitance needed, the capacitors inside the DRAM cell needed to be etched in deep. In addition, one of the key problems with DRAM is its need to be refreshed both in frequency (DRAM chips in your computer typically refresh every 50ms) and how much power is needed to refresh them.
Instead, researchers found a 2-transistor solution, where one transistor is a normal silicon based one and the other an indium-gallium-zinc-oxide (or IGZO) based one. The IGZO transistor has the property of being able to store enough of a charge like a capacitor when switched off, but leaks at a much slower rate. This means less need to refresh as often, which in turn means less energy usage. And since IGZO transistors can be built mostly in the same way as silicon-based ones, they take up less space and thus, higher densities. The icing on the cake is that IGZO based transistors aren't anything new; they're already used in thin-film transistors used to control LCD screens and they can be manufactured using existing technology with minor modifications.