OpenVera
OpenVera was a hardware verification language developed by System Science and acquired by Synopsys.[1] OpenVera was an interoperable, open hardware verification language for testbench creation. The OpenVera language was used as the basis for the advanced verification features in the IEEE Std. 1800 SystemVerilog standard, for the benefit of the entire verification community including companies in the semiconductor, systems, IP and EDA industries along with verification services.
The OpenVera language reference manual (LRM) can be obtained at no cost, but modifications to the language must go through Synopsys.
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